| 摘要 |
PROBLEM TO BE SOLVED: To realize a small-scaled, always preferential and high speed data input/output mechanism for memory incorporated in a processor. SOLUTION: This information processor is constituted of: a processor for executing pipe line processing to instructions; a memory incorporated in the processor; and an input/output control means for performing access to the memory with a high priority. This method for arbitrating memory access comprises a step (S512) for making a clock to be supplied to the processor wait when the accesses of the processor and the input/output control means to the memory are competing, a step (S506) for executing the access of the input/output control means to the memory, and steps (S507, S511) for executing the access of the processor to the memory by releasing the clock wait of the processor after the access of the input/output control means to the memory ends. COPYRIGHT: (C)2004,JPO&NCIPI
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