METHOD FOR FABRICATING SEMICONDUCTOR INTEGRATED CIRCUIT BY SELECTIVE DISPOSABLE SPACER TECHNIQUE AND SEMICONDUCTOR INTEGRATED CIRCUIT FABRICATED THEREBY

摘要

PURPOSE: A method for fabricating a semiconductor integrated circuit by a selective disposable spacer technique is provided to improve reliability of a high-integrated flash memory device by maximizing the width of a metal contact hole exposing source/drain regions and by preventing a void from being formed in narrow openings. CONSTITUTION: A plurality of gate patterns is formed on a semiconductor substrate. The regions between the gate patterns are composed of the first opening with the first width and the second opening with the second width greater than the first width. A spacer is formed on the sidewall of the second opening while the first opening is filled with a spacer layer pattern. The spacer is selectively removed to expose the sidewall of the first opening. The semiconductor integrated circuit includes a broad opening extended by removal of the spacer and a narrow deep opening filled with the spacer layer pattern.