发明名称 Direct build-up layer on an encapsulated die package having a moisture barrier structure
摘要 A packaging technology that fabricates a microelectronic package including build-up layers, having conductive traces, on an encapsulated microelectronic die and on other packaging material that surrounds the microelectronic die, wherein an moisture barrier structure is simultaneously formed with the conductive traces. An exemplary microelectronic package includes a microelectronic die having an active surface and at least one side. Packaging material(s) is disposed adjacent the microelectronic die side(s), wherein the packaging material includes at least one surface substantially planar to the microelectronic die active surface. A first dielectric material layer may be disposed on at least a portion of the microelectronic die active surface and the encapsulation material surface. At least one conductive trace is then formed on the first dielectric material layer to electrically contact the microelectronic die active surface. A barrier structure proximate an edge of the microelectronic package is formed simultaneously out of the same material as the conductive traces.
申请公布号 US2004155352(A1) 申请公布日期 2004.08.12
申请号 US20040774923 申请日期 2004.02.09
申请人 INTEL CORPORATION 发明人 MA QING
分类号 H01L21/56;H01L23/00;H01L23/31;H01L23/498;H01L23/538;(IPC1-7):H01L21/476;H01L29/40 主分类号 H01L21/56
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