Parallel testing of integrated circuits

摘要

A number of integrated circuit chips are connected in parallel with a testing equipment which issues a first test command CTRL1 (20). The tests are then made asynchronously PROCESS1 (21) and the integrated circuits wait WAIT CONTROL2 (22). After a time interval the testing equipment asks for a reply SEND CTRL2 (23) and there is a synchronous reply SEND ANSW (24). An independent claim is also included for: A system which has pairs of contacts to connect integrated circuits in parallel with a testing equipment and integrated circuits able to respond to a synchronous operation command.