| 摘要 |
<p>A heat balance circuit which can give a constant delay time to an input signal even though there is a change in the frequency of the input signal to a delay circuit formed in a CMOS IC. A delay circuit (10) and a dummy circuit (11) having the same circuit construction are formed in a CMOS IC. A counter counts first pulse signals CP1 supplied to the delay circuit for a predetermined time, and arithmetic means outputs the difference between the counted value of this counter and a set value. A number of second pulse signals equivalent to the difference output from the arithmetic means are supplied to a dummy circuit, and the numbers of the first and second pulses per unit time supplied to the CMOS IC are controlled to a predetermined value so as to make the heat generation of the CMOS IC uniform.</p> |
