发明名称 HIGH NOISE REJECTION VOLTAGE-CONTROLLED RING OSCILLATOR ARCHITECTURE
摘要 <p>A ring oscillator circuit, such as a VCO, with a relatively high level of noise rejection for noise originating from both the voltage supply and ground. The ring oscillator circuit is composed of a plurality of differential delay circuits, each differential delay circuit generating a differential output signal that is a delayed (and preferably inverted) version of a differential input signal. Each differential delay circuit includes first and second input transistors for receiving the differential input signal. Each differential delay circuit also includes first and second load transistors coupled in parallel with the respective first and second input transistors. Each differential delay circuit further includes a first current source coupled between the first input transistor and a first power supply terminal (e.g., a voltage supply terminal), a second current source coupled between the second input transistor and the first power supply terminal and a third current source coupled between the first and second input transistors and a second power supply terminal (e.g., a ground terminal). The first and second current sources reduce the coupling of noise from the first power supply terminal to the output. The third current source reduces the coupling of noise from the second power supply terminal to the output.</p>
申请公布号 EP1266453(B1) 申请公布日期 2004.08.11
申请号 EP20010903189 申请日期 2001.01.22
申请人 BROADCOM CORPORATION 发明人 LIU, BIN
分类号 H03F3/45;H03F3/72;H03K3/0231;H03K5/00;H03K5/13;H03L7/099;(IPC1-7):H03K3/023 主分类号 H03F3/45
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