FREQUENCY MULTIPLIER CAPABLE OF ADJUSTING DUTY CYCLE OF CLOCK AND MULTIPLYING METHOD

摘要

PURPOSE: A frequency multiplier capable of adjusting the duty cycle of a clock and a multiplying method are provided to automatically adjust the duty cycle of the multiplied clock by controlling the delay amount of the delay circuit. CONSTITUTION: A frequency multiplier capable of adjusting the duty cycle of a clock includes a delay circuit(210), an exclusive logical adder(220) and a control circuit(230). The delay circuit(210) receives a first clock and outputs a delay clock by a predetermined time. The exclusive logical adder(220) receives the first clock and the delayed clock and outputs the second clock by exclusively and logically adding the first clock and the delayed clock. The control circuit(230) detects the phase difference between the first clock and the delay clock and outputs a predetermined control signal corresponding to the detected phase difference to the delay circuit(210). And, the control signal controls the delay amount of the delay circuit(210).