发明名称 |
Method for manufacturing a self-aligned split-gate flash memory cell |
摘要 |
A method for manufacturing a split-gate flash memory cell, comprising the steps of forming an active region on a semiconductor substrate; forming a buffer layer on the semiconductor substrate; forming a first dielectric layer on the buffer layer; removing part of the first dielectric layer; defining an opening; removing the buffer layer within the opening; forming a gate insulating layer and floating gates; forming a source region in the semiconductor substrate; depositing a conformal second dielectric layer on the opening; removing the buffer layer outside the first dielectric layer and the floating gates; and forming an oxide layer and control gates.
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申请公布号 |
US6773993(B2) |
申请公布日期 |
2004.08.10 |
申请号 |
US20010880783 |
申请日期 |
2001.06.15 |
申请人 |
NANYA TECHNOLOGY CORPORATION |
发明人 |
LIN CHI-HUI;HUANG CHUNG-LIN;HUANG CHENG-CHIH |
分类号 |
H01L21/28;H01L29/423;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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