发明名称 Arithmetic circuit to increase the speed of a modular multiplication for a public key system for encryption
摘要 A circuit and a method for solving the Montgomery multiplier bottleneck problem encountered during a memory access using two ports or single port general-purpose memories is described. A first and a second memory are provided such that variables that are stored in one memory must be read for an operation to be recorded in the second memory. Thereafter, during a reading cycle corresponding to a pipeline process, certain of the variables are read from the first memory and are loaded in the predetermined register while the other variables are read from the second memory and are loaded in the remaining registers.
申请公布号 US6772942(B2) 申请公布日期 2004.08.10
申请号 US20010023147 申请日期 2001.12.18
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 TAKANO KOHJI;SATOH AKASHI
分类号 G06F7/527;G06F7/44;G06F7/72;G06F9/30;G06F9/38;G06F12/06;(IPC1-7):G06F11/10 主分类号 G06F7/527
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