发明名称 |
System and method for coarse tuning a phase locked loop (PLL) synthesizer using 2-PI slip detection |
摘要 |
A system for coarsely tuning at least one voltage controlled oscillator (VCO) (211) in a phase locked loop (PLL) synthesizer (200) that includes a phase-frequency detector (PFD) for determining a phase difference between a VCO frequency and a reference frequency and providing an error signal if the VCO frequency and reference frequency are at least 2pi radians out of phase. A monitor (215) is then used for tracking the number of error signals produced by the PFD. The free running frequency of the VCO may be coarsely tuned in the event the monitor circuit reaches some predetermined level. The invention offers great advantage in enabling a PLL to be coarsely tuned to enable the PLL's VCO to remain with an operational range despite operational factors that effect circuit operation.
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申请公布号 |
US6774732(B1) |
申请公布日期 |
2004.08.10 |
申请号 |
US20030367007 |
申请日期 |
2003.02.14 |
申请人 |
MOTOROLA, INC. |
发明人 |
HARNISHFEGER DAVID B.;BRUESKE DANIEL E.;MARTIN FREDERICK L. |
分类号 |
H03L;H03L7/085;H03L7/089;H03L7/099;H03L7/10;H03L7/16;H03L7/18;(IPC1-7):H03L7/085 |
主分类号 |
H03L |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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