发明名称 Method for fabricating shallow trench isolation between deep trench capacitors
摘要 The present invention studs oxide dielectric into trench capacitor top recesses after the formation of the trench capacitor structures. A thin (500 Å) cap buffer nitride is then deposited over the substrate. The studded dielectric and the collar oxide protect the trench capacitors during the subsequent selective dry etching, thereby forming isolation trenches having an approximately T-shaped cross section between the trench capacitors within the memory array area of the semiconductor chip.
申请公布号 US6774008(B1) 申请公布日期 2004.08.10
申请号 US20030605076 申请日期 2003.09.07
申请人 UNITED MICROELETRONICS CORP 发明人 SU YI-NAN;SUN NATHAN
分类号 H01L21/334;H01L21/762;H01L21/8242;(IPC1-7):H01L21/76 主分类号 H01L21/334
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