发明名称 |
POST CMP POROGEN BURN OUT PROCESS |
摘要 |
A method and structure for forming an integrated circuit structure is disclosed that forms at least one first layer comprising logical and functional devices and forms at least one interconnection layer above the first layer. The interconnection layer is adapted to form electrical connections between the logical and functional devices. The interconnection layer is made by first forming a dielectric layer. The dielectric layer includes a first material and a second material, wherein the second material is less stable at manufacturing environmental conditions (e.g., the processing conditions discussed below) than the first material. The "second material" comprises a porogen and the "first material" comprises a matrix polymer. The invention then forms conductive features in the dielectric layer and removes (e.g., by heating) the second material from the dielectric layer to create air pockets in the interconnection layer where the second material was positioned. |
申请公布号 |
AU2003282483(A1) |
申请公布日期 |
2004.08.10 |
申请号 |
AU20030282483 |
申请日期 |
2003.10.09 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORP. |
发明人 |
NITTA SATYANARAYANA;S. TYBERG CHRISTY;CHEN SHYNG-TSONG;M. GATES STEPHEN;C. HEDRICK JEFFREY;MALONE KELLY |
分类号 |
H01L23/522;H01L23/532;(IPC1-7):H01L23/58;H01L21/31;H01L21/302;H01L21/476;H01L21/44;H01L21/00;H01L23/52;H01L23/48 |
主分类号 |
H01L23/522 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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