| 摘要 |
PURPOSE: A semiconductor memory device using a common bus at a test mode and a normal mode is provided to reduce an area of a chip by sharing a wire for a test mode. CONSTITUTION: A semiconductor memory device includes the first bus(300a), the second bus(500a), a selection portion(700), a test signal storage portion(900), and a signal processing portion(600). The first bus is used for transmitting a signal of a normal mode. The second bus is used for transmitting a signal of a test mode. The selection portion outputs selectively one of the signals of the normal mode and the test mode to the third bus(800) according to a control signal. A test signal storage portion receives a signal of the third bus in response to the control signal, latches the received signal, and outputs the latched signal. A signal processing portion is connected to the third bus in order to process the signal of the normal mode.
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