| 摘要 |
PURPOSE: A method for fabricating a MOS transistor is provided to form a nano gate by controlling deposition thickness of a nitride layer to control width of a gate. CONSTITUTION: A gate oxide layer(13), a first nitride layer, and a sacrificial oxide layer are sequentially formed on an active region of a semiconductor substrate(11). A gate hole is formed by etching selectively the sacrificial oxide layer and the first nitride layer. A first sidewall is formed on an inner wall of the gate hole. A polysilicon layer(17) is formed on the exposed gate oxide layer and the first sidewall in order to bury the gate hole. The first nitride layer is exposed by performing a CMP process for the sacrificial oxide layer, the polysilicon layer, and the first sidewall. The first nitride layer and the first sidewall are removed therefrom. Source and drain regions(20) are formed by performing an ion implantation process.
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