发明名称 NONVOLATILE MULTI-LEVEL SEMICONDUCTOR MEMORY
摘要 <p><P>PROBLEM TO BE SOLVED: To shorten a write time of multi-level data for a nonvolatile memory cell. <P>SOLUTION: A plurality of nonvolatile memory cells are connected in series through an input/output node. A plurality of source lines are connected respectively to the prescribed bit lines (input/output node) through a switch operated by a switch control circuit write operation or verifying operation. Therefore, a plurality of source power voltage generated by a voltage generating circuit can be supplied respectively to input/output nodes of memory cells. Therefore, a plurality of logic values can be written respectively in a plurality of memory cells with one time write-in operation. Also, a plurality of memory cells in which different logic values are written respectively can be verified with one verifying operation. Consequently, execution time of write operation and verifying operation can be shortened. <P>COPYRIGHT: (C)2004,JPO&NCIPI</p>
申请公布号 JP2004220728(A) 申请公布日期 2004.08.05
申请号 JP20030009355 申请日期 2003.01.17
申请人 FUJITSU LTD 发明人 HORIIKE MASATO
分类号 G11C16/02;G11C16/04;G11C16/06;(IPC1-7):G11C16/02 主分类号 G11C16/02
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