发明名称 MRAM ARCHITECTURE WITH A GROUNDED WRITE BIT LINE AND ELECTRICALLY ISOLATED READ BIT LINE
摘要 Each memory cell (260, 262, 266, 268) of a magnetoresistive random access memory (MRAM) array (200) has a magnetoresistive tunnel junction (MTJ) and a transistor (261) coupled to the MTJ. Writing occurs by write lines (220, 232) along rows and columns of the array. One set of the write lines (232, 236) is connected to the end of the MTJs that is not connected to the transistors. These write lines are thereby close to the MTJs and thus have good magnetic coupling to the MTJs, which is important in keeping write current low. These write lines are driven on one end by drivers (240, 252). Sensing on the other hand occurs on a read bit line (222) that is coupled to the end of the transistor of the memory cell that is not coupled to the MTJ. By having the sense amplifier(s) (270) on a different line from the write drivers, sensing is not slowed by the capacitance of the write drivers (240, 252).
申请公布号 WO2004066306(A2) 申请公布日期 2004.08.05
申请号 WO2004US01137 申请日期 2004.01.16
申请人 MOTOROLA INC.;NAHAS, JOSEPH, J. 发明人 NAHAS, JOSEPH, J.
分类号 G11C11/15;G11C11/16 主分类号 G11C11/15
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