发明名称 MULTIPROCESSOR SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a multiprocessor system which efficiently decides a processor processing an interrupt request from a plurality of processors. SOLUTION: When an interrupt signal T<SB>2</SB>corresponding to the first interrupt request S<SB>1</SB>is accepted by a processor 2<SB>2</SB>, a storage content of a register 14<SB>1</SB>is rewritten from data '1111' of an initial value to data '0001' showing the number of the processor 2<SB>2</SB>. Next, the second interrupt request S<SB>1</SB>is inputted to a decoder 15<SB>1</SB>. Because the data '0001' are stored in the register 14<SB>1</SB>, an assignment part 10A selects an output part 11<SB>2</SB>from a plurality of output parts 11<SB>1</SB>, 11<SB>2</SB>, and inputs an interrupt signal V<SB>2</SB>corresponding to the second interrupt request S<SB>1</SB>. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004220309(A) 申请公布日期 2004.08.05
申请号 JP20030006741 申请日期 2003.01.15
申请人 RENESAS TECHNOLOGY CORP 发明人 SAKUKAWA MAMORU
分类号 G06F15/177;G06F9/46;(IPC1-7):G06F9/46 主分类号 G06F15/177
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