发明名称 Fault recovery method and a storage controller in an informatin processing apparatus
摘要 In a shared bus connection scheme or an individual path connection scheme, a fault caused at a part of a system affects the same in its entirety. Also, these schemes do not permit the determination of fault locations. Adapters 11, 12 are connected to shared memories 21, 22 with a plurality of individual paths 31 through 38. An address locking unit (not shown) is arranged in each of the shared memories 21, 22 to perform address lock check on memory access operations from the adapters 11, 12. If an address to be accessed is in the locked state, the access is held in the lock wait state until the address is unlocked. The access is made when the address locking is cleared.
申请公布号 US2004153691(A1) 申请公布日期 2004.08.05
申请号 US20030600828 申请日期 2003.06.23
申请人 HITACHI, LTD.;HITACHI SOFTWARE ENGINEERING CO., LTD. 发明人 FUJIMOTO TAKEO;HONMA HISAO;OKUMOTO KATSUHIRO;SAKAGUCHI OSAMU
分类号 G06F13/14;G06F3/06;G06F11/07;G06F11/14;G06F11/20;G06F13/36;(IPC1-7):H04L1/22 主分类号 G06F13/14
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