发明名称 CIRCUIT BOARD AND INTERLAYER CONNECTION METHOD OF MULTILAYER WIRING CIRCUIT BOARD
摘要 <p><P>PROBLEM TO BE SOLVED: To improve reliability in electrical connection by absorbing strain caused at the interface between a conductive paste and an insulating layer or a circuit layer so that the stress caused between fillers in the conductive paste and at the contact part between the filler and the circuit layer is reduced. <P>SOLUTION: A circuit board (1) electrically connects conductors (8) and (9) disposed on both surfaces of an insulating layer (2) with a through hole (5) formed in the insulating layer (2) in between, through a conductive paste (7) which is packed in the through hole (5) and cured. A core member (6) comprising a material whose Young's modulus is smaller than the insulating layer (2), the conductors (8) and (9), and the conductive paste (7) which has been cured, is provided in the through hole (5). <P>COPYRIGHT: (C)2004,JPO&NCIPI</p>
申请公布号 JP2004221433(A) 申请公布日期 2004.08.05
申请号 JP20030008834 申请日期 2003.01.16
申请人 FUJIKURA LTD 发明人 WATANABE TARO;NAKAO SATORU;NAGATA MASAKATSU;MIZUTANI MUNEKIMI;ITO SHOJI;OKAMOTO MASAHIRO;PONPANPAANI ANAN
分类号 H05K1/11;H05K3/40;H05K3/46;(IPC1-7):H05K1/11 主分类号 H05K1/11
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