发明名称 Memory trouble relief circuit
摘要 When a redundancy circuit is provided to relieve the inferiority of a semiconductor storage device, and then, the semiconductor storage device has no defect, power is inconveniently supplied even to the unused redundancy circuit to generate unnecessary leakage current. A self-diagnosis circuit for a semiconductor storage device is provided to perform the self-diagnosis of the semiconductor storage device upon turning on a power source. Power (2) is supplied to a redundancy circuit part and power (1) is supplied to a circuit part except the redundancy circuit part. When the semiconductor storage device has no defect as a result of the self-diagnosis, a control for turning off the power (2) of the redundancy circuit part is performed.
申请公布号 US2004151022(A1) 申请公布日期 2004.08.05
申请号 US20030716876 申请日期 2003.11.20
申请人 MIZUKOSHI NORIKO 发明人 MIZUKOSHI NORIKO
分类号 H01L21/822;G06F11/00;G11C7/24;G11C11/00;G11C11/40;G11C11/4063;G11C29/00;G11C29/02;G11C29/04;H01L21/82;H01L27/04;H01L27/10;(IPC1-7):G11C11/00 主分类号 H01L21/822
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