| 摘要 |
PROBLEM TO BE SOLVED: To provide such an apparatus that, after a data series of continuous binaries is converted to an input data word of a 4 bits unit, it can be converted to an output code word train of a 6 bit unit satisfying a RLL rule of either of a (1, 7) RLL rule or 8≤k≤12, also DSV control can be performed without adding a redundant bit to the output code word train, and the DC component of the output code word train can be suppressed effectively. SOLUTION: Suppression of a DC component under limitation of k=7 or 8 is performed by using a encoding table which can convert 4 bits into 6 bits with an (1, k) RLL rule without using redundant bits. COPYRIGHT: (C)2004,JPO&NCIPI
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