发明名称 |
Fault-tolerant computer system, re-synchronization method thereof and re-synchronization program thereof |
摘要 |
In a lock-step synchronism fault-tolerant computer system including a plurality of computing modules having a processor and a memory in which each computing module processes the same instruction string in synchronization with each other. When detecting disagreement in a state of access to an external bus among the respective processors in each computing module, if no fault is detected in the system including each computing module, processing of resuming operation in synchronization is executed with respect to each computing module after generating an interruption to all the processors to execute delay adjustment for making a state of instruction execution among computing modules be coincident.
|
申请公布号 |
US2004153857(A1) |
申请公布日期 |
2004.08.05 |
申请号 |
US20030614150 |
申请日期 |
2003.07.08 |
申请人 |
NEC CORPORATION |
发明人 |
YAMAZAKI SHIGEO;AINO SHIGEYUKI |
分类号 |
G06F11/18;G01R31/317;G01R31/3185;G06F1/12;G06F11/00;G06F11/10;G06F11/16;G06F11/20;G06F11/273;G06F12/08;G06F12/14;G06F12/16;G06F13/00;H04L12/56;(IPC1-7):H04L1/22 |
主分类号 |
G06F11/18 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|