发明名称 CPU STARTING CONTROL DEVICE AND CPU STARTING CONTROL METHOD
摘要 <P>PROBLEM TO BE SOLVED: To normally restart a CPU with reduced additional construction in a computer device even with a failure of a starting memory area, in which device operation failure of the CPU is detected by a watch dog timer and the CPU is restarted when the operation is abnormal. <P>SOLUTION: This device comprises a storage means having a first and second starting memory areas for storing the same starting program, respectively, and divided by the difference of 0 or 1 between high one bits of the addresses; a flip-flop circuit for outputting, at the time of watch dog resetting, a signal reversed from the one at the time of starting, and an EXOR circuit for receiving the output signal of the flip-flop circuit and the high one bit signal of an address signal outputted when the CPU accesses either the first or second starting memory area, and outputting a signal of their exclusive OR to the storage means as the high one bit of the address signal. <P>COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004220173(A) 申请公布日期 2004.08.05
申请号 JP20030004535 申请日期 2003.01.10
申请人 YAMAHA CORP 发明人 ARITA YOSHIHIRO
分类号 G06F12/16;G06F9/445;G06F11/14;G06F11/30 主分类号 G06F12/16
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