| 摘要 |
A high-speed, noise-safe, non-inverting flip-flop ("flop") is provided. In the flop, a buffer is used to isolate a data input terminal from the remainder of the flop circuitry to prevent erroneous operation of the flop circuitry. Also, a slave node is connected to a master node to avoid the need for an additional buffer on a data signal critical path, thus preserving the high-speed of the flop circuitry. Overlapped clock signals are used to control data signal transmission to the master node and the slave node. The overlapped clock signals allow the buffer used to isolate the data input terminal to also be used to drive the data signal through the master node to the slave node.
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