发明名称 Semiconductor latches and SRAM devices
摘要 A new Static Random Access Memory (SRAM) cell using Thin Film Transistors (TFT) is disclosed. In a first embodiment, an SRAM cell comprises a strong inverter and a strong access device constructed on a semiconductor substrate layer, and a weak inverter and a weak access device constructed in a semiconductor thin film layer located vertically above the strong devices. The strong devices are used in the data read and write paths, and the weak devices are used for latch feed-back and sector data erase. This first embodiment is used for high density and high speed memory applications. In a second embodiment, an SRAM cell comprises thin film inverters and thin film access devices constructed in a semiconductor thin film layer located substantially above logic transistors. The TFT SRAM cell is buried above the logic gates of an Integrated Circuit to consume no extra Silicon real estate. This second embodiment is used for slow access and Look-Up-Tables type memory applications.
申请公布号 US2004152279(A1) 申请公布日期 2004.08.05
申请号 US20040764048 申请日期 2004.01.26
申请人 MADURAWE RAMINDA UDAYA 发明人 MADURAWE RAMINDA UDAYA
分类号 G11C7/00;G11C11/412;H01L21/76;H01L21/8244;H01L21/84;H01L27/11;H01L27/12;H03F3/45;(IPC1-7):H01L21/76 主分类号 G11C7/00
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