发明名称 |
DIGITAL SIGNAL DECODING SYSTEM |
摘要 |
PROBLEM TO BE SOLVED: To provide a digital signal decoder which realizes minimizing a decoding impossible area occurring when time-varying structure cannot be controlled in the case of performing Viterbi decoding by using a trellis having the time-varying structure. SOLUTION: In the case of decoding a decoding system from a decoder input signal by using a time-varying trellis where the number of states and transition vary depending on the time, time deviation on the time-varying trellis is judged by a decoding system judgment circuit by using a TCPR Viterbi decorded system decoded by using the time-varying trellis and a PR Viterbi decoded system decoded by using a non-time-varying trellis to obtain a decoding system selection signal. With the decoding system selection signal, a selector selects the PR Viterbi decoded system when there is time deviation on the time-varying trellis, and selects the TCPR Viterbi decoded system when there is not time deviation. COPYRIGHT: (C)2004,JPO&NCIPI
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申请公布号 |
JP2004220730(A) |
申请公布日期 |
2004.08.05 |
申请号 |
JP20030009449 |
申请日期 |
2003.01.17 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
ISHITA HIROYOSHI;NOGUCHI NOBUAKI |
分类号 |
G11B20/14;G11B20/10;G11B20/18;H03M13/29;H03M13/41;(IPC1-7):G11B20/14 |
主分类号 |
G11B20/14 |
代理机构 |
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地址 |
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