Selective filling of electrically conductive vias for three dimensional device structures

摘要

Methods and apparatus for forming and/or enabling interconnection in a substrate. An example embodiment of a method comprises forming a via in the substrate. A preconditioning layer is deposited on the substrate. A catalyst layer is then bound to the preconditioning layer. A conductive material is deposited on the catalyst layer by electro-less deposition to fill the via with the conductive material. Deposition of the conductive material is selectively disabled from coating surfaces of the substrate outside the via. Advantageous alternatives are presented.