摘要 |
A semiconductor device comprises an internal circuit and a clock signal switching unit group having M clock signal switching units. m first clock signals and n control signals are input to the clock signal switching unit group (M is not less than m, and M is not less than n). Each of the M clock signal switching units, to which one of the m first clock signals, and an output clock signal from another clock signal switching unit are input, selects one of the m first clock signal and a signal obtained by delaying the output clock signal from another clock signal switching unit, based on the n control signals, and outputs the selected one of the m first clock signal and the signal as an output clock signal. The output clock signal controls the internal circuit.
|