| 摘要 |
The decoding method based on computing syndrome is for a code defined on a Galois body whose parity-check matrix H is of dimension (s+t)x(2N), where s, t and N are strictly positive integers, and a received code word R=(T U) is of length 2N, where T and U are row vectors of length N. The parity-check matrix H comprises as blocks a matrix Hs of dimensions sxN, and matrices HtM1 and HtM2, where the matrix Ht is of dimensions txN, and M1 and M2 are diagonal matrices of dimensions NxN. The syndrome characterizing an error to be corrected is given by S=H.RT, where the superscript T denotes the transposition. The first s symbols of the syndrome S are computed by evaluating a polynomial associated with the matrix T+U at the roots of polynomial generator of the matrix Hs, and the next t symbols of the syndrome S are computed by evaluating a polynomial associated with the matrix T.M1+U.M2 at the roots of polynomial generator of the matrix Ht. The evaluation steps implement the algorithm of Horner, and the code is hyperelliptic. The decoding device (claimed) comprises a counter of clock strokes, two read-only stores connected to the counter and representing N diagonal elements of the matrices M1 and M2, a first multiplication element multiplying the output of the first store with a symbol of the received word R of length 2N, a second multiplication element multiplying the output of the second store with a symbol of the received word R delayed by N clock strokes, a first addition element delivering the symbols corresponding to the matrix T.M1+U.M2, a second addition element delivering the symbols corresponding to the matrix U+T, a first circuit implementing the Corner algorithm connected to the second addition element for computing the first s elements of the syndrome S, and a second circuit implementing the Horner algorithm connected to the first addition element for computing the last t elements of the syndrome S. The two read-only stores are look-up tables, multiplexers, or combinatorial circuits. An apparatus (claimed) for digital signal processing comprises means for implementing the decoding method, or the decoding device. A telecommunication network (claimed) and a base station (claimed) comprise means for implementing the decoding method, or the decoding device. |
