发明名称 |
MICROPROCESSOR USING AN INTERRUPT SIGNAL FOR TERMINATING A POWER-DOWN MODE AND METHOD THEREOF FOR CONTROLLING A CLOCK SIGNAL RELATED TO THE POWER-DOWN MODE |
摘要 |
A microprocessor uses an interrupt signal for terminating a power-down mode, and a method thereof is used for controlling a clock signal related to the power-down mode. The microprocessor has a clock control unit for controlling whether a clock signal is outputted from a clock generator to the microprocessor, a first control unit which outputs a first control signal to the clock control unit when being level-triggered by an interrupt signal, and a second control unit which outputs a second control signal to the clock control unit for activating a power-down mode. The method includes (a) generating the second control signal to stop the clock generator from outputting the clock signal to the microprocessor, and (b) generating the interrupt signal to trigger the corresponding first control signal for terminating the power-down mode and actuating the clock generator to output the clock signal to the microprocessor after performing step (a).
|
申请公布号 |
US2004148535(A1) |
申请公布日期 |
2004.07.29 |
申请号 |
US20030248484 |
申请日期 |
2003.01.23 |
申请人 |
HSU JANY-YEE;JIANG MENG-CHOW |
发明人 |
HSU JANY-YEE;JIANG MENG-CHOW |
分类号 |
G06F1/32;(IPC1-7):G06F1/32 |
主分类号 |
G06F1/32 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|