发明名称 |
LAYOUT METHOD AND DESIGN METHOD OF MICROCOMPUTERS |
摘要 |
PROBLEM TO BE SOLVED: To enable reduction of a developing time and an evaluation time after design. SOLUTION: In a layout method of two or more types of microcomputers having different memory capacities, the layout of peripheral function blocks of the microcomputers previously prepared as well as a positional relationship between the peripheral function blocks and a pad connected to the peripheral function blocks are not changed and later commonly used for layout of the microcomputers to be prepared. COPYRIGHT: (C)2004,JPO&NCIPI
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申请公布号 |
JP2004214564(A) |
申请公布日期 |
2004.07.29 |
申请号 |
JP20030002494 |
申请日期 |
2003.01.08 |
申请人 |
RENESAS TECHNOLOGY CORP |
发明人 |
WATANABE KATSUKICHI;MATSUI HIDEO |
分类号 |
H01L21/822;H01L21/82;H01L27/04;(IPC1-7):H01L21/82 |
主分类号 |
H01L21/822 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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