Multi-layer integrated semiconductor structure

摘要

A multi-layer integrated semiconductor structure including a first device layer having a first plurality of semiconductor elements. A first insulating layer is disposed over the first device layer and includes at least a first via-hole. A first conductive plug is disposed in the first via-hole. An interface portion is disposed over at least the first conductive plug. The multi-layer integrated semiconductor structure further includes a second device layer. The second device layer includes a second plurality of semiconductor elements disposed on a top surface of a substrate, which includes a second via-hole. A second conductive plug is disposed in the second via-hole. The second device layer is aligned and coupled to the first device layer via the interface portion so that the interface portion provides a communication relationship between the first device layer and the second device layer.