发明名称 METHOD FOR MANUFACTURING LAMINATED VARISTOR
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a laminated varistor which has excellent insulation resistance, voltage nonlinearity, etc. and which hardly brings about the deterioration of the characteristics after a high temperature load test, by reducing the characteristic variations between the varistors even if reducing the size and the height. <P>SOLUTION: The method for manufacturing the laminated varistor includes the steps of preparing a laminate in which a plurality of internal electrodes are laminated via an unburned ceramic layer containing a composition containing a ZnO as a main component, and an outer ceramic layer made of ceramics containing the same composition as the ceramic layer is provided at the laminating direction outside the internal electrode laminated part; baking the laminate to obtain a sintered material; and forming the internal electrode on the outer surface of the sintered material. The baking step is performed in a baking profile having at least a temperature raising step, a high temperature holding step, and a temperature lowering step. The oxygen concentration in an atmosphere in the high temperature holding step is set to 15 vol% or more. The oxygen concentration in at least the partial temperature range of the temperature range from the temperature lowering starting temperature of the temperature lowering step to 600°C is set to 1 to 15 vol%. <P>COPYRIGHT: (C)2004,JPO&NCIPI</p>
申请公布号 JP2004214448(A) 申请公布日期 2004.07.29
申请号 JP20030000358 申请日期 2003.01.06
申请人 MURATA MFG CO LTD 发明人 HIROSE SAKYO;SHIRATSUYU KOSUKE
分类号 H01C7/10;(IPC1-7):H01C7/10 主分类号 H01C7/10
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