发明名称 WAFER LEVEL CHIP SIZE PACKAGE AND ITS MANUFACTURING METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a fan in type wafer level chip size package applicable to a high-frequency communication field, and to provide its manufacturing method. <P>SOLUTION: In the wafer level chip size package, an adhesive sheet 20s with copper foil previously formed with an opening 23 at a position corresponding to an input/output pad 12 of a semiconductor chip 11 is thermocompressed to a wafer 10 in which the semiconductor chip 11 is fabricated, a photosensitive polyimide resin layer 30 is formed thereon, a thin hole 31h reaching the copper foil 21 and a thin hole 33h reaching the input/output pad 12 are formed by irradiating UV-rays and other parts are optically cured. Subsequently, a plating seed layer and a plating resist film are formed and electrolytic plating of copper is carried out, the electrode part 32 of the copper foil 21, the rewiring layer 34 and its electrode part 35 are formed in fan-in types and a cover coat 36 is provided. In the individual semiconductor chips 11 obtained by dicing the wafer 10, the copper foil 21 is connected with the ground potential part of a printed wiring board. <P>COPYRIGHT: (C)2004,JPO&NCIPI</p>
申请公布号 JP2004214501(A) 申请公布日期 2004.07.29
申请号 JP20030001274 申请日期 2003.01.07
申请人 SONY CORP 发明人 ASAMI HIROSHI
分类号 H01L23/12;H01L21/56;(IPC1-7):H01L23/12 主分类号 H01L23/12
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