| 摘要 |
An image display device and an image display panel having high accuracy of adjusting sampling timing of a video signal and being capable of preventing a constant wasteful power consumption, comprise a timing detection circuit for generating a timing detection signal changing from a first level to a second level every time a switch circuit connected to each data line shared by pixels in each column sends a video signal, and the timing detection circuit includes at an output terminal of a timing detection signal a means (for example, PMOS) for closing a current path on the first level side and a means (for example NMOS) for opening a current path on the second level side respectively in synchronization with a video signal sending operation of the switch circuit.
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