发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT MANUFACTURING METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>A semiconductor integrated circuit having a plurality of bipolar transistors. The plurality of bipolar transistors are formed as follows. In a plurality of transistor creation regions (Al,A2),a second conductive base layer (4) containing germanium is formed on the surface of a first conductive collector layer (2), and a first conductive emitter layer (6) made of a semiconductor material having a greater band gap than the base layer (4) is formed on the surface of the second conductive base layer (4). Between the plurality of transistor creation regions (Al, A2), emitter layers (6, 61) contain different concentrations of impurities. Thus, at the base-emitter junction boundaries of the at least two transistor creation regions (Al, A2), germanium concentrations are different, which in turn results in different ON voltages required for ON-operation of the plurality of bipolar transistors. This semiconductor integrated circuit can reduce power consumption while maintaining preferable performance of the bipolar transistors.</p>
申请公布号 WO2004064161(A1) 申请公布日期 2004.07.29
申请号 WO2004JP00172 申请日期 2004.01.14
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;ASAI, AKIRA;TAKAGI, TAKESHI 发明人 ASAI, AKIRA;TAKAGI, TAKESHI
分类号 H01L21/331;H01L21/8222;H01L27/082;H01L29/737;(IPC1-7):H01L27/082;H01L21/822 主分类号 H01L21/331
代理机构 代理人
主权项
地址