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发明名称
State assignment of logic circuits
摘要
申请公布号
GB2397672(A)
申请公布日期
2004.07.28
申请号
GB20040002265
申请日期
2000.01.27
申请人
* AUTOMATIC PARALLEL DESIGNS LIMITED
发明人
PETER * MEULEMANS;SUNIL * TALWAR
分类号
G06F17/50;(IPC1-7):G06F17/50
主分类号
G06F17/50
代理机构
代理人
主权项
地址
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