发明名称 |
METHOD FOR FORMING GATE OF TRANSISTOR |
摘要 |
PURPOSE: A method for forming a gate of a transistor is provided to stabilize the operation of a transistor by easily controlling the length of an N- region as a lightly doped region to control the thickness of the wall of a dielectric and by patterning the second conductive layer to have a uniform thickness wherein the patterned wall of the dielectric is used as a mask. CONSTITUTION: A gate oxide layer(20) of a predetermined thickness is formed on a substrate(10). The first conductive layer(30) of a predetermined thickness is deposited on the gate oxide layer and is patterned to be a predetermined type by using the first conductive layer as a hard mask. Ions of a relatively low impurity density are implanted into the gate oxide layer at both sides of the patterned first conductive layer to form an N- region of the substrate. The second conductive layer(40) of a predetermined thickness is deposited by using the gate oxide layer and the first conductive layer. A dielectric layer(50) of a predetermined thickness is deposited along the upper part of the second conductive layer. The dielectric layer is patterned by a space etching process. The second conductive layer is patterned by an etch process using the patterned dielectric layer as a mask. Ions of a relatively high impurity density are implanted into the upper part of the gate oxide layer from which the second conductive layer is removed so that an N+ region is formed in the substrate.
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申请公布号 |
KR20040066542(A) |
申请公布日期 |
2004.07.27 |
申请号 |
KR20030003633 |
申请日期 |
2003.01.20 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM, GI CHEOL |
分类号 |
H01L21/336;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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