| 摘要 |
PROBLEM TO BE SOLVED: To enable the execution of a plurality of digital signal processing algorithms differing in basic arithmetic language length by use of the same microprocessor and eliminate the shortage of command sets in a microprocessor of fixed length instruction format. SOLUTION: This microprocessor comprises an instruction memory 1, a data memory 6, a general register 4, an instruction decoder 2, an arithmetic unit 3, a memory interface unit 5, and a data memory arithmetic language length calculation table 7 for generating an arithmetic language length selection signal for switching the arithmetic language length on the basis of an address outputted from the memory interface unit 5 to the data memory 6. The instruction decoder 2 decodes the arithmetic language length selection signal and a fetched instruction, and switches the arithmetic language length according to the address of the data memory 6 to access. COPYRIGHT: (C)2004,JPO&NCIPI
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