发明名称 |
METHOD FOR FABRICATING SAMPLE MATERIAL FOR ANALYZING DEFECT IN SEMICONDUCTOR DEVICE |
摘要 |
PURPOSE: A method for fabricating sample material for analyzing defects in a semiconductor device is provided to easily and exactly catch fail factor by using dry-etching without loss. CONSTITUTION: A conductive line(120) with a hard mask and a nitride spacer(160a) is formed on a semiconductor substrate(100). The first oxide layer(180a), a nitride layer and the second oxide layer as an interlayer dielectric are sequentially formed on the resultant structure. A contact hole is formed to expose the substrate by selectively etching the interlayer dielectric. A plug(230a) is filled in the contact hole. The second oxide layer is removed. The hard mask and the nitride layer are simultaneously removed by dry-etching to expose the conductive line.
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申请公布号 |
KR20040065033(A) |
申请公布日期 |
2004.07.21 |
申请号 |
KR20030002152 |
申请日期 |
2003.01.13 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
CHOI, JEONG BAE;KIM, JUN DONG |
分类号 |
H01L21/66;(IPC1-7):H01L21/66 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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