发明名称
摘要 To provide a communication apparatus that can relieve the processing load when packet transfer is made with hardware. A packet transfer apparatus includes an input buffer for storing temporarily an input packet, an address acquiring section for acquiring the information needed for the transfer, a retrieval circuit for retrieving the information regarding the output with the acquired destination address as a key, a label insertion circuit for encapsulating a packet with the labels in the maximum number of stack layers M designated for a packet group having a unit of destination address, and a switch section for switching the encapsulated packet to a desired output destination port.
申请公布号 JP3543952(B2) 申请公布日期 2004.07.21
申请号 JP20000220617 申请日期 2000.07.21
申请人 发明人
分类号 H04L12/56;H04L29/06;(IPC1-7):H04L12/56 主分类号 H04L12/56
代理机构 代理人
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