发明名称 Test circuit and test method for protecting an IC against damage from activation of too many current drawing circuits at one time
摘要 Power supply connections to an integrated circuit are tested. The power supply connections are connected to a power supply conductor in the integrated circuit. For the test, combinations of current drawing circuits are switched on near the point where the power supply connection under test is connected to the power supply conductor. The current drawing circuits draw a considerable current, so as to cause a detectable voltage drop over the power supply connection, if this connection is operational. Different subsets of the current drawing circuits are activated successively. To prevent that all of the current drawing circuits are switched on at the same time by error, activation of each subset is controlled by a signal indicative of completion of activation of the preceding subset. A respective signal line is provided for each subset, to provide the signal for the subset.
申请公布号 US6765403(B2) 申请公布日期 2004.07.20
申请号 US20020067206 申请日期 2002.02.05
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 DE JONG FRANCISCUS GERARDUS MARIA;SCHUTTERT RODGER FRANK;DE WILDE JOHANNES;DEN BESTEN GERRIT WILLEM
分类号 G01R19/165;(IPC1-7):G01R31/02 主分类号 G01R19/165
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