发明名称 SEMICONDUCTOR DEVICE AND ITS TESTING METHOD
摘要 PROBLEM TO BE SOLVED: To shorten a test time by simple circuit constitution, and to restrain a circuit area for a test from increasing. SOLUTION: This semiconductor device 10 is provided with a macro memory 11 mounted mixedly with a logic part. An operation control part 12 is provided in the macro memory 11 to execute a data reading-out/writing-in operation based on an input signal including an address, a data and a command. A test register 16 for storing a data for selecting a test mode is provided in a storage area selected by the address. A writing-in circuit 15 outputs a control signal RGT allowing writing-in of the data to the test register 16, in response to the writing-in command WR output from the operation control part 12. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004198367(A) 申请公布日期 2004.07.15
申请号 JP20020370274 申请日期 2002.12.20
申请人 FUJITSU LTD 发明人 FURUYAMA TAKAAKI
分类号 G01R31/28;G01R31/317;G01R31/319;H01L21/822;H01L27/04;(IPC1-7):G01R31/28 主分类号 G01R31/28
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