发明名称 Halbleiterspeicheranordnung
摘要 A semiconductor memory device having electrically erasable nonvolatile memory cells to and from which data is automatically written and erased according to an internal algorithm incorporated in said semiconductor memory device. The allowable value of write or erase operations is determined according to the internal algorithm, which is variable. Thus, a device embodying the present invention can carry out a delivery test with "n" rewrite operations at the most, and taking into account deterioration due to an increase in the number of rewrite operations, can guarantee the maximum number of rewrite operations N (N>n) possible by a user. <IMAGE>
申请公布号 DE69333548(D1) 申请公布日期 2004.07.15
申请号 DE1993633548 申请日期 1993.06.25
申请人 FUJITSU LTD., KAWASAKI 发明人 AKAOGI, TAKAO;TAKASHINA, NOBUAKI;KASA, YASUSHI;ITANO, KIYOSHI;KAWASHIMA, HIROMI;YAMASHITA, MINORU;KAWAMURA, SHOUICHI
分类号 G11C5/14;G11C7/06;G11C8/00;G11C8/08;G11C8/10;G11C16/04;G11C16/08;G11C16/10;G11C16/12;G11C16/16;G11C16/26;G11C16/30;G11C16/34;G11C29/00;G11C29/34;G11C29/46;G11C29/50;(IPC1-7):G11C16/08 主分类号 G11C5/14
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