| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a logic verifying device which is capable of verifying a large-scale logic circuit with a few FPGA chips. <P>SOLUTION: The logic verifying device comprises FPGAs which can be dynamically reconfigured, a configuration memory storing a plurality of configuration data, and a first selection circuit which repeats a cycle of successively selecting the plurality of configuration data and writing them all in the FPGAs a few times. The logic realized by the configuration data on the FPGAs is successively replaced with new one in each writing operation. <P>COPYRIGHT: (C)2004,JPO&NCIPI |
