发明名称 MANUFACTURING METHOD FOR MULTILAYER CIRCUIT SUBSTRATE
摘要 PROBLEM TO BE SOLVED: To provide a manufacturing method for a multilayer circuit substrate to control the occurrence of a deformation and an interlayer peeling and to increase a dimensional accuracy by controlling a shrinkage in a face direction. SOLUTION: A laminate body formed by laminating a plurality of first insulating layers 1a to 1f consisting of first inorganic components and a plurality of second insulating layers 1g to 1k consisting of second inorganic components whose thicknesses are greater than the first insulating layers and initiates to shrink at higher temperature than that of the first insulating layers as heat is applied is heated at a first temperature range which is lower than the shrinkage initiating temperature of the second insulating layers and higher than the shrinkage initiating temperature of the first insulating layers. The first insulating layers 1a to 1f are largely shrunk in their thickness direction rather than in their face direction and then the laminate body is sintered shrinking the second insulating layers 1g to 1k in their thickness direction rather than in their face direction by heating the laminate body at a second temperature range which is higher than the shrinkage initiating temperature of the second insulating layers. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004200679(A) 申请公布日期 2004.07.15
申请号 JP20030407890 申请日期 2003.12.05
申请人 KYOCERA CORP 发明人 ODA TSUTOMU;SAKANOUE AKIHIRO;NAKANO NORIO;FURUHASHI KAZUMASA
分类号 H05K3/46;H01L23/12;(IPC1-7):H05K3/46 主分类号 H05K3/46
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