发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a degree of freedom in the design of an LDD overlapped with a gate electrode through self alignment by applying etching work under an etching condition having a high selectivity between a mask pattern and a metal such as titanium or the like upon forming a first conductive layer pattern, in a problem related to the selectivity of the etching work. SOLUTION: A lamination structural body consisting of a lower layer side first conductive layer and an upper layer side second conductive layer is formed on a semiconductor layer through a gate insulating film, then, a mask pattern is formed on the lamination structural body. Subsequently, the second conductive layer and the first conductive layer are processed by etching under a condition that the etching rate of the mask pattern is quick to form the first conductive layer pattern having a tapered part at the edge of the same, then, the second conductive layer in the first conductive layer pattern is processed selectively by etching based on a remaining mask pattern to form a second conductive layer pattern whereby the second conductive layer pattern, shorter than the first conductive layer, is formed. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004200378(A) 申请公布日期 2004.07.15
申请号 JP20020366618 申请日期 2002.12.18
申请人 SEMICONDUCTOR ENERGY LAB CO LTD 发明人 MONOE SHIGEHARU;YOKOSHIMA TAKASHI;SASAGAWA SHINYA
分类号 G02F1/1368;H01L21/28;H01L21/3065;H01L21/3213;H01L21/336;H01L29/423;H01L29/49;H01L29/786;(IPC1-7):H01L21/336;H01L21/306;G02F1/136 主分类号 G02F1/1368
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