发明名称 |
Balanced circuit arrangement and method for linearizing such as arrangement |
摘要 |
The present invention relates to a balanced circuit arrangement and methods for linearizing and calibrating such a circuit arrangement, wherein linearization is obtained by introducing a load imbalance between the output branches of the balanced circuit arrangement. Thus, a controllable extraneous imbalance is created between the output loads of the balanced circuit arrangement to thereby obtain a linearization by means of even-order non-linearity.
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申请公布号 |
US2004137870(A1) |
申请公布日期 |
2004.07.15 |
申请号 |
US20030474848 |
申请日期 |
2003.10.15 |
申请人 |
KIVEKAS KALLE;PARSSINEN AARNO |
发明人 |
KIVEKAS KALLE;PARSSINEN AARNO |
分类号 |
H03D7/14;H04B1/12;H04B1/30;(IPC1-7):H04B1/18 |
主分类号 |
H03D7/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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