发明名称 |
Manufacturing process for a high voltage transistor integrated on a semiconductor substrate with non-volatile memory cells and corresponding transistor |
摘要 |
A process for fabricating high-voltage drain-extension transistors, whereby the transistors are integrated in a semiconductor substrate along with non-volatile memory cells that include floating gate transistors. The process includes: defining respective active areas for HV transistors and floating gate transistors in a semiconductor substrate, with the active areas separated from each other by insulating regions; forming insulated gate regions of the HV transistors; performing a first dopant implantation to form first portions of the HV transistor junctions; conformably depositing a dielectric layer onto the whole substrate to provide an interpoly layer of the floating gate transistor; making openings at the first portions of the HV transistor junctions; performing, through the openings, a second dopant implantation to form second portions of the high-voltage transistor junctions, with perimeter areas of the gate regions and the active area of the floating gate transistor being screened off by the dielectric layer.
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申请公布号 |
US2004137668(A1) |
申请公布日期 |
2004.07.15 |
申请号 |
US20030675245 |
申请日期 |
2003.09.29 |
申请人 |
STMICROELECTRONICS S.R.L. |
发明人 |
ZULIANI PAOLA;GIARDA KATIA;ANNUNZIATA ROBERTO |
分类号 |
H01L21/336;H01L21/8247;H01L27/105;(IPC1-7):H01L21/335 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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