发明名称 |
MULTIPROCESSOR SYSTEM AND BUS ARBITRATING METHOD |
摘要 |
PROBLEM TO BE SOLVED: To prevent the deterioration of system performance generated when a processor whose priority order is low is turned to be time-out, and to give bus use permission to a processor whose real time processing has top priority. SOLUTION: A request accepting part 201 accepts the use request of a common bus 101 from processors 102-1 to 102-3. Counters 202-1 to 202-3 are made to correspond to respective processors, and counted with values weighted corresponding to the priority order of the processors. A maximum value detecting part 204 reads a counter corresponding to the processor which has issued the bus use request, and detects the maximum value. A register detecting part 205 detects whether or not real time processing is highly required in the processor. A request deciding part 206 decides the processor to which the bus use permission should be given based on information notified form the maximum value detecting part 204 and the register detecting part 205. COPYRIGHT: (C)2004,JPO&NCIPI
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申请公布号 |
JP2004199374(A) |
申请公布日期 |
2004.07.15 |
申请号 |
JP20020366877 |
申请日期 |
2002.12.18 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
MURAKAMI TAKAYUKI;YAMANAKA RIYUUTAROU |
分类号 |
G06F15/177;G06F13/362;(IPC1-7):G06F13/362 |
主分类号 |
G06F15/177 |
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